Flash memories used for embedded applications may comprise two or three transistors per bitline, referred to as 2Tr flash or 3Tr flash, respectively. For example, 3Tr flash may comprise one memory cell transistor and two select gate transistors series connected in a bitline. 2Tr flash may comprise one memory cell transistor and one select gate transistor series which are connected in a bitline. In applications, 3Tr flash memory may be used in pre-pay subway, train, or toll booth cards, monetary cards or cellular phone cards, just to name a few examples. 2Tr flash memory may be used for central or multiple processing unit (CPU or MPU) embedded integrated circuits (IC's), for example.
In a bitline of a 3Tr flash, one memory cell transistor may be sandwiched between two select gate transistors so that the memory cell transistor may be robust against programming disturbances. In one application, by utilizing a page buffer, byte data from an external chip may be overwritten in the page buffer and written to physical memory cells of a plurality of 3Tr flash memory, which may operate like a Byte-EEPROM, for example. Therefore, a memory comprising a plurality of 3Tr flash memory may be used for an application where relatively frequent cycles of reprogramming byte data are involved. Two select gate transistors of 3Tr flash may protect stored data in the memory cell transistor from reprogramming disturbances, for example. A bitline side select gate transistor present in a 3Tr flash memory may not be present in a 2Tr flash memory configuration. In a CPU or MPU embedded chip, 2Tr flash memory may be used as a replacement for mask read-only memory (ROM), for example. In this case, once a reprogramming operation is requested, data of a 2Tr flash memory may be reprogrammed. Therefore, programming disturbance may be avoided. Moreover, a relatively large cell current may be attained by removing a bitline side select transistor in a 2Tr flash memory. As a result, relatively high speed access may be achieved for 2Tr flash memory so as to satisfy CPU or MPU specifications, in contrast to the case for 3Tr flash memory. Both 3Tr and 2Tr flash memory may use a uniform Fowler-Nordheim (FN) tunneling mechanism for erasing and programming operations, which is similar to that of NAND flash.